1. Field of the Invention
The present invention relates generally to a high power transistor. More particularly, the present invention relates to an apparatus and a method for reducing drain modulation of a high power transistor.
2. Description of the Related Art
High power transistors (for example, Lateral Double diffused MOS (LDMOS), gallium arsenide (GaAs) transistor, and the like) for high power amplifiers have high power and use a current of several amperes. Specifically, in the case of a Code Division Multiple Access (CDMA) that amplifies a modulated signal, magnitude of the input signal continuously varies with time and thus an amount of output current continuously varies. Referring to FIG. 1, when magnitude of an input signal 101 increases, an amount of output current also increases. Thus, a DC bias voltage 102 applied to a drain of a transistor is instantaneously reduced. This phenomenon is called a drain modulation. The drain modulation occurs much more often when a modulated signal having a specific bandwidth is amplified in CDMA or Wideband Code Division Multiple Access (WCDMA). The drain modulation is caused by resistive components existing in inductors, bias lines used to apply a bias to a high power transistor, or by resistive components of the transistor itself.
In the drain modulation, the AC component characteristic acts as power noise in the transistor of the high power amplifier, degrading performance of the transistor. The drain modulation influences a spurious characteristic (Adjacent Channel Power Ratio (ACPR), Adjacent Channel Leakage Power Ratio (ACLR), and the like) that is one of important factors indicating the performance of the high power amplifier. Also, the drain modulation causes a memory effect phenomenon. Hence, when the amplifier is implemented with actual transistors, the technical application of pre-distortion is difficult.
To minimize the drain modulation and maximize the performance of the amplifier, the amplifier is implemented using capacitors having large capacitance in the bias lines. However, the drain modulation cannot be completely removed only using the capacitors. Also, the use of the capacitors influences the switching speed of the transistor, resulting in the performance degradation of the transistor. Moreover, the amplifier has to be designed to be large in size, thus increasing its price. Consequently, the amplifier having the above-described structure has no benefit of performance in a real channel environment.
Accordingly, there is a need for an improved apparatus and method that minimizes drain modulation of a high power transistor.